//! I2C/SPI interfaces #![deny(missing_docs)] extern crate embedded_hal as hal; use hal::blocking; use super::{ DEVICE_ADDRESS, Error }; /// I2C interface #[derive(Debug, Default)] pub struct I2cInterface { pub(crate) i2c: I2C, } /// SPI interface #[derive(Debug, Default)] pub struct SpiInterface { pub(crate) spi: SPI, pub(crate) cs: CS } /// Write to a register pub trait WriteRegister { /// Error type type Error; /// Write to an u8 register fn write_register(&mut self, register: u8, data: u8) -> Result<(), Error>; } impl WriteRegister for I2cInterface where I2C: blocking::i2c::Write { type Error = E; fn write_register(&mut self, register: u8, data: u8) -> Result<(), Error> { let payload: [u8; 2] = [register, data]; self.i2c .write(DEVICE_ADDRESS, &payload) .map_err(Error::Comm) } } impl WriteRegister for SpiInterface where SPI: blocking::spi::Write, CS: hal::digital::OutputPin { type Error = E; fn write_register(&mut self, register: u8, data: u8) -> Result<(), Error> { self.cs.set_low(); let payload: [u8; 2] = [register + 0x80, data]; let result = self.spi .write(&payload) .map_err(Error::Comm); self.cs.set_high(); result } } /// Read a register pub trait ReadRegister { /// Error type type Error; /// Read an u8 register fn read_register(&mut self, register: u8) -> Result>; } impl ReadRegister for I2cInterface where I2C: blocking::i2c::WriteRead { type Error = E; fn read_register(&mut self, register: u8) -> Result> { let mut data = [0]; self.i2c .write_read(DEVICE_ADDRESS, &[register], &mut data) .map_err(Error::Comm) .and(Ok(data[0])) } } impl ReadRegister for SpiInterface where SPI: blocking::spi::Transfer, CS: hal::digital::OutputPin { type Error = E; fn read_register(&mut self, register: u8) -> Result> { self.cs.set_low(); let mut data = [register, 0]; { let result = self.spi .transfer(&mut data) .map_err(Error::Comm); self.cs.set_high(); result?; } Ok(data[1]) } }