kirbylife
/
ds323x-rs
mirror of https://github.com/eldruin/ds323x-rs
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Finish updating to embedded-hal 1.0.0

master
Diego Barrios Romero 2025-01-02 08:35:42 +01:00
parent 21546c07d3
commit 3597c7407e
17 changed files with 174 additions and 163 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
CHANGELOG.md
View File

@ -9,6 +9,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/spec/v2.0.0.
## [Unreleased] - ReleaseDate
### Changed
- [breaking-change] Removed `Error::Pin` variant.
- [breaking-change] Update to `embedded-hal` 1.0.0.
- Raised MSRV to version 1.75.0

1
Cargo.toml
View File

@ -26,6 +26,7 @@ rtcc = "0.3"
[dev-dependencies]
embedded-hal-mock = { version = "0.11.1", features = ["eh1"] }
embedded-hal-bus = "0.2"
linux-embedded-hal = "0.4.0"
[profile.release]

9
src/ds3232.rs
View File

@ -32,7 +32,7 @@ where
/// [`enable_32khz_output()`](#method.enable_32khz_output).
///
/// Note: This is only available for DS3232 and DS3234 devices.
pub fn enable_32khz_output_on_battery(&mut self) -> Result<(), Error<E, ()>> {
pub fn enable_32khz_output_on_battery(&mut self) -> Result<(), Error<E>> {
let status = self.status | BitFlags::BB32KHZ;
self.write_status_without_clearing_alarm(status)
}
@ -43,7 +43,7 @@ where
/// it enabled. See [`enable_32khz_output()`](#method.enable_32khz_output).
///
/// Note: This is only available for DS3232 and DS3234 devices.
pub fn disable_32khz_output_on_battery(&mut self) -> Result<(), Error<E, ()>> {
pub fn disable_32khz_output_on_battery(&mut self) -> Result<(), Error<E>> {
let status = self.status & !BitFlags::BB32KHZ;
self.write_status_without_clearing_alarm(status)
}
@ -55,10 +55,7 @@ where
/// temperature changes will not be compensated for.
///
/// Note: This is only available for DS3232 and DS3234 devices.
pub fn set_temperature_conversion_rate(
&mut self,
rate: TempConvRate,
) -> Result<(), Error<E, ()>> {
pub fn set_temperature_conversion_rate(&mut self, rate: TempConvRate) -> Result<(), Error<E>> {
let status = match rate {
TempConvRate::_64s => self.status & !BitFlags::CRATE1 & !BitFlags::CRATE0,
TempConvRate::_128s => self.status & !BitFlags::CRATE1 | BitFlags::CRATE0,

31
src/ds3234.rs
View File

@ -2,21 +2,17 @@
use crate::interface::{SpiInterface, WriteData};
use crate::{ic, BitFlags, Ds323x, Error, Register, TempConvRate, CONTROL_POR_VALUE};
use core::marker::PhantomData;
use embedded_hal::{digital::OutputPin, spi};
use embedded_hal::spi;
impl<SPI, CS, CommE, PinE> Ds323x<SpiInterface<SPI, CS>, ic::DS3234>
impl<SPI, E> Ds323x<SpiInterface<SPI>, ic::DS3234>
where
SPI: spi::SpiDevice<u8, Error = CommE>,
CS: OutputPin<Error = PinE>,
SPI: spi::SpiDevice<u8, Error = E>,
{
/// Create a new instance.
pub fn new_ds3234(spi: SPI, chip_select: CS) -> Self {
pub fn new_ds3234(spi: SPI) -> Self {
const STATUS_POR_VALUE: u8 = BitFlags::OSC_STOP | BitFlags::BB32KHZ | BitFlags::EN32KHZ;
Ds323x {
iface: SpiInterface {
spi,
cs: chip_select,
},
iface: SpiInterface { spi },
control: CONTROL_POR_VALUE,
status: STATUS_POR_VALUE,
_ic: PhantomData,
@ -24,8 +20,8 @@ where
}
/// Destroy driver instance, return SPI bus instance and CS output pin.
pub fn destroy_ds3234(self) -> (SPI, CS) {
(self.iface.spi, self.iface.cs)
pub fn destroy_ds3234(self) -> SPI {
self.iface.spi
}
/// Enable the 32kHz output when battery-powered. (enabled per default)
@ -34,7 +30,7 @@ where
/// [`enable_32khz_output()`](#method.enable_32khz_output).
///
/// Note: This is only available for DS3232 and DS3234 devices.
pub fn enable_32khz_output_on_battery(&mut self) -> Result<(), Error<CommE, PinE>> {
pub fn enable_32khz_output_on_battery(&mut self) -> Result<(), Error<E>> {
let status = self.status | BitFlags::BB32KHZ;
self.write_status_without_clearing_alarm(status)
}
@ -45,7 +41,7 @@ where
/// it enabled. See [`enable_32khz_output()`](#method.enable_32khz_output).
///
/// Note: This is only available for DS3232 and DS3234 devices.
pub fn disable_32khz_output_on_battery(&mut self) -> Result<(), Error<CommE, PinE>> {
pub fn disable_32khz_output_on_battery(&mut self) -> Result<(), Error<E>> {
let status = self.status & !BitFlags::BB32KHZ;
self.write_status_without_clearing_alarm(status)
}
@ -57,10 +53,7 @@ where
/// temperature changes will not be compensated for.
///
/// Note: This is only available for DS3232 and DS3234 devices.
pub fn set_temperature_conversion_rate(
&mut self,
rate: TempConvRate,
) -> Result<(), Error<CommE, PinE>> {
pub fn set_temperature_conversion_rate(&mut self, rate: TempConvRate) -> Result<(), Error<E>> {
let status = match rate {
TempConvRate::_64s => self.status & !BitFlags::CRATE1 & !BitFlags::CRATE0,
TempConvRate::_128s => self.status & !BitFlags::CRATE1 | BitFlags::CRATE0,
@ -73,14 +66,14 @@ where
/// Enable the temperature conversions when battery-powered. (enabled per default)
///
/// Note: This is only available for DS3234 devices.
pub fn enable_temperature_conversions_on_battery(&mut self) -> Result<(), Error<CommE, PinE>> {
pub fn enable_temperature_conversions_on_battery(&mut self) -> Result<(), Error<E>> {
self.iface.write_register(Register::TEMP_CONV, 0)
}
/// Disable the temperature conversions when battery-powered.
///
/// Note: This is only available for DS3234 devices.
pub fn disable_temperature_conversions_on_battery(&mut self) -> Result<(), Error<CommE, PinE>> {
pub fn disable_temperature_conversions_on_battery(&mut self) -> Result<(), Error<E>> {
self.iface
.write_register(Register::TEMP_CONV, BitFlags::TEMP_CONV_BAT)
}

16
src/ds323x/alarms.rs
View File

@ -150,9 +150,9 @@ fn amend_hour(hours: Hours) -> Hours {
}
}
impl<DI, IC, CommE, PinE> Ds323x<DI, IC>
impl<DI, IC, E> Ds323x<DI, IC>
where
DI: ReadData<Error = Error<CommE, PinE>> + WriteData<Error = Error<CommE, PinE>>,
DI: ReadData<Error = Error<E>> + WriteData<Error = Error<E>>,
{
/// Set Alarm1 for day of the month.
///
@ -165,7 +165,7 @@ where
&mut self,
when: DayAlarm1,
matching: Alarm1Matching,
) -> Result<(), Error<CommE, PinE>> {
) -> Result<(), Error<E>> {
let day_invalid = when.day < 1 || when.day > 31;
let hour_invalid = is_hour_valid(when.hour);
let minute_invalid = when.minute > 59;
@ -200,7 +200,7 @@ where
///
/// Will return an `Error::InvalidInputData` if any of the parameters is out of range.
/// The day is not used by this matching strategy and is set to 1.
pub fn set_alarm1_hms(&mut self, when: NaiveTime) -> Result<(), Error<CommE, PinE>> {
pub fn set_alarm1_hms(&mut self, when: NaiveTime) -> Result<(), Error<E>> {
let alarm = DayAlarm1 {
day: 1,
hour: Hours::H24(when.hour() as u8),
@ -221,7 +221,7 @@ where
&mut self,
when: WeekdayAlarm1,
matching: Alarm1Matching,
) -> Result<(), Error<CommE, PinE>> {
) -> Result<(), Error<E>> {
let weekday_invalid = when.weekday < 1 || when.weekday > 7;
let hour_invalid = is_hour_valid(when.hour);
let minute_invalid = when.minute > 59;
@ -263,7 +263,7 @@ where
&mut self,
when: DayAlarm2,
matching: Alarm2Matching,
) -> Result<(), Error<CommE, PinE>> {
) -> Result<(), Error<E>> {
let day_invalid = when.day < 1 || when.day > 31;
let hour_invalid = is_hour_valid(when.hour);
let minute_invalid = when.minute > 59;
@ -293,7 +293,7 @@ where
///
/// Will return an `Error::InvalidInputData` if any of the parameters is out of range.
/// The day is not used by this matching strategy and is set to 1.
pub fn set_alarm2_hm(&mut self, when: NaiveTime) -> Result<(), Error<CommE, PinE>> {
pub fn set_alarm2_hm(&mut self, when: NaiveTime) -> Result<(), Error<E>> {
let alarm = DayAlarm2 {
day: 1,
hour: Hours::H24(when.hour() as u8),
@ -313,7 +313,7 @@ where
&mut self,
when: WeekdayAlarm2,
matching: Alarm2Matching,
) -> Result<(), Error<CommE, PinE>> {
) -> Result<(), Error<E>> {
let weekday_invalid = when.weekday < 1 || when.weekday > 7;
let hour_invalid = is_hour_valid(when.hour);
let minute_invalid = when.minute > 59;

40
src/ds323x/configuration.rs
View File

@ -5,18 +5,18 @@ use crate::{
BitFlags, Ds323x, Error, Register, SqWFreq,
};
impl<DI, IC, CommE, PinE> Ds323x<DI, IC>
impl<DI, IC, E> Ds323x<DI, IC>
where
DI: ReadData<Error = Error<CommE, PinE>> + WriteData<Error = Error<CommE, PinE>>,
DI: ReadData<Error = Error<E>> + WriteData<Error = Error<E>>,
{
/// Enable the oscillator (set the clock running) (default).
pub fn enable(&mut self) -> Result<(), Error<CommE, PinE>> {
pub fn enable(&mut self) -> Result<(), Error<E>> {
let control = self.control;
self.write_control(control & !BitFlags::EOSC)
}
/// Disable the oscillator (stops the clock).
pub fn disable(&mut self) -> Result<(), Error<CommE, PinE>> {
pub fn disable(&mut self) -> Result<(), Error<E>> {
let control = self.control;
self.write_control(control | BitFlags::EOSC)
}
@ -24,7 +24,7 @@ where
/// Force a temperature conversion and time compensation with TXCO algorithm.
///
/// The *busy* status should be checked before doing this. See [`busy()`](#method.busy)
pub fn convert_temperature(&mut self) -> Result<(), Error<CommE, PinE>> {
pub fn convert_temperature(&mut self) -> Result<(), Error<E>> {
let control = self.iface.read_register(Register::CONTROL)?;
// do not overwrite if a conversion is in progress
if (control & BitFlags::TEMP_CONV) == 0 {
@ -35,55 +35,55 @@ where
}
/// Enable the 32kHz output. (enabled per default)
pub fn enable_32khz_output(&mut self) -> Result<(), Error<CommE, PinE>> {
pub fn enable_32khz_output(&mut self) -> Result<(), Error<E>> {
let status = self.status | BitFlags::EN32KHZ;
self.write_status_without_clearing_alarm(status)
}
/// Disable the 32kHz output.
pub fn disable_32khz_output(&mut self) -> Result<(), Error<CommE, PinE>> {
pub fn disable_32khz_output(&mut self) -> Result<(), Error<E>> {
let status = self.status & !BitFlags::EN32KHZ;
self.write_status_without_clearing_alarm(status)
}
/// Set the aging offset.
pub fn set_aging_offset(&mut self, offset: i8) -> Result<(), Error<CommE, PinE>> {
pub fn set_aging_offset(&mut self, offset: i8) -> Result<(), Error<E>> {
self.iface
.write_register(Register::AGING_OFFSET, offset as u8)
}
/// Read the aging offset.
pub fn aging_offset(&mut self) -> Result<i8, Error<CommE, PinE>> {
pub fn aging_offset(&mut self) -> Result<i8, Error<E>> {
let offset = self.iface.read_register(Register::AGING_OFFSET)?;
Ok(offset as i8)
}
/// Set the interrupt/square-wave output to be used as interrupt output.
pub fn use_int_sqw_output_as_interrupt(&mut self) -> Result<(), Error<CommE, PinE>> {
pub fn use_int_sqw_output_as_interrupt(&mut self) -> Result<(), Error<E>> {
let control = self.control;
self.write_control(control | BitFlags::INTCN)
}
/// Set the interrupt/square-wave output to be used as square-wave output. (default)
pub fn use_int_sqw_output_as_square_wave(&mut self) -> Result<(), Error<CommE, PinE>> {
pub fn use_int_sqw_output_as_square_wave(&mut self) -> Result<(), Error<E>> {
let control = self.control;
self.write_control(control & !BitFlags::INTCN)
}
/// Enable battery-backed square wave generation.
pub fn enable_square_wave(&mut self) -> Result<(), Error<CommE, PinE>> {
pub fn enable_square_wave(&mut self) -> Result<(), Error<E>> {
let control = self.control;
self.write_control(control | BitFlags::BBSQW)
}
/// Disable battery-backed square wave generation.
pub fn disable_square_wave(&mut self) -> Result<(), Error<CommE, PinE>> {
pub fn disable_square_wave(&mut self) -> Result<(), Error<E>> {
let control = self.control;
self.write_control(control & !BitFlags::BBSQW)
}
/// Set the square-wave output frequency.
pub fn set_square_wave_frequency(&mut self, freq: SqWFreq) -> Result<(), Error<CommE, PinE>> {
pub fn set_square_wave_frequency(&mut self, freq: SqWFreq) -> Result<(), Error<E>> {
let new_control = match freq {
SqWFreq::_1Hz => self.control & !BitFlags::RS2 & !BitFlags::RS1,
SqWFreq::_1_024Hz => self.control & !BitFlags::RS2 | BitFlags::RS1,
@ -94,30 +94,30 @@ where
}
/// Enable Alarm1 interrupts.
pub fn enable_alarm1_interrupts(&mut self) -> Result<(), Error<CommE, PinE>> {
pub fn enable_alarm1_interrupts(&mut self) -> Result<(), Error<E>> {
let control = self.control;
self.write_control(control | BitFlags::ALARM1_INT_EN)
}
/// Disable Alarm1 interrupts.
pub fn disable_alarm1_interrupts(&mut self) -> Result<(), Error<CommE, PinE>> {
pub fn disable_alarm1_interrupts(&mut self) -> Result<(), Error<E>> {
let control = self.control;
self.write_control(control & !BitFlags::ALARM1_INT_EN)
}
/// Enable Alarm2 interrupts.
pub fn enable_alarm2_interrupts(&mut self) -> Result<(), Error<CommE, PinE>> {
pub fn enable_alarm2_interrupts(&mut self) -> Result<(), Error<E>> {
let control = self.control;
self.write_control(control | BitFlags::ALARM2_INT_EN)
}
/// Disable Alarm2 interrupts.
pub fn disable_alarm2_interrupts(&mut self) -> Result<(), Error<CommE, PinE>> {
pub fn disable_alarm2_interrupts(&mut self) -> Result<(), Error<E>> {
let control = self.control;
self.write_control(control & !BitFlags::ALARM2_INT_EN)
}
fn write_control(&mut self, control: u8) -> Result<(), Error<CommE, PinE>> {
fn write_control(&mut self, control: u8) -> Result<(), Error<E>> {
self.iface.write_register(Register::CONTROL, control)?;
self.control = control;
Ok(())
@ -126,7 +126,7 @@ where
pub(crate) fn write_status_without_clearing_alarm(
&mut self,
status: u8,
) -> Result<(), Error<CommE, PinE>> {
) -> Result<(), Error<E>> {
// avoid clearing alarm flags
let new_status = status | BitFlags::ALARM2F | BitFlags::ALARM1F;
self.iface.write_register(Register::STATUS, new_status)?;

22
src/ds323x/datetime.rs
View File

@ -9,11 +9,11 @@ use crate::{
Register, Rtcc, Timelike,
};
impl<DI, IC, CommE, PinE> DateTimeAccess for Ds323x<DI, IC>
impl<DI, IC, E> DateTimeAccess for Ds323x<DI, IC>
where
DI: ReadData<Error = Error<CommE, PinE>> + WriteData<Error = Error<CommE, PinE>>,
DI: ReadData<Error = Error<E>> + WriteData<Error = Error<E>>,
{
type Error = Error<CommE, PinE>;
type Error = Error<E>;
fn datetime(&mut self) -> Result<NaiveDateTime, Self::Error> {
let mut data = [0; 8];
@ -54,9 +54,9 @@ where
}
}
impl<DI, IC, CommE, PinE> Rtcc for Ds323x<DI, IC>
impl<DI, IC, E> Rtcc for Ds323x<DI, IC>
where
DI: ReadData<Error = Error<CommE, PinE>> + WriteData<Error = Error<CommE, PinE>>,
DI: ReadData<Error = Error<E>> + WriteData<Error = Error<E>>,
{
fn seconds(&mut self) -> Result<u8, Self::Error> {
self.read_register_decimal(Register::SECONDS)
@ -212,20 +212,16 @@ where
}
}
impl<DI, IC, CommE, PinE> Ds323x<DI, IC>
impl<DI, IC, E> Ds323x<DI, IC>
where
DI: ReadData<Error = Error<CommE, PinE>> + WriteData<Error = Error<CommE, PinE>>,
DI: ReadData<Error = Error<E>> + WriteData<Error = Error<E>>,
{
fn read_register_decimal(&mut self, register: u8) -> Result<u8, Error<CommE, PinE>> {
fn read_register_decimal(&mut self, register: u8) -> Result<u8, Error<E>> {
let data = self.iface.read_register(register)?;
Ok(packed_bcd_to_decimal(data))
}
fn write_register_decimal(
&mut self,
register: u8,
decimal_number: u8,
) -> Result<(), Error<CommE, PinE>> {
fn write_register_decimal(&mut self, register: u8, decimal_number: u8) -> Result<(), Error<E>> {
self.iface
.write_register(register, decimal_to_packed_bcd(decimal_number))
}

8
src/ds323x/mod.rs
View File

@ -17,7 +17,7 @@ fn packed_bcd_to_decimal(bcd: u8) -> u8 {
(bcd >> 4) * 10 + (bcd & 0xF)
}
fn hours_to_register<CommE, PinE>(hours: Hours) -> Result<u8, Error<CommE, PinE>> {
fn hours_to_register<E>(hours: Hours) -> Result<u8, Error<E>> {
match hours {
Hours::H24(h) if h > 23 => Err(Error::InvalidInputData),
Hours::H24(h) => Ok(decimal_to_packed_bcd(h)),
@ -28,7 +28,7 @@ fn hours_to_register<CommE, PinE>(hours: Hours) -> Result<u8, Error<CommE, PinE>
}
}
fn some_or_invalid_error<T, CommE, PinE>(data: Option<T>) -> Result<T, Error<CommE, PinE>> {
fn some_or_invalid_error<T, E>(data: Option<T>) -> Result<T, Error<E>> {
if let Some(data) = data {
Ok(data)
} else {
@ -42,7 +42,7 @@ mod tests {
#[test]
fn if_some_then_get_inner() {
match some_or_invalid_error::<u8, (), ()>(Some(1)) {
match some_or_invalid_error::<u8, ()>(Some(1)) {
Ok(1) => (),
_ => panic!(),
}
@ -50,7 +50,7 @@ mod tests {
#[test]
fn if_none_then_error() {
match some_or_invalid_error::<u8, (), ()>(None) {
match some_or_invalid_error::<u8, ()>(None) {
Err(Error::InvalidDeviceState) => (),
_ => panic!(),
}

22
src/ds323x/status.rs
View File

@ -5,18 +5,18 @@ use crate::{
BitFlags, Ds323x, Error, Register,
};
impl<DI, IC, CommE, PinE> Ds323x<DI, IC>
impl<DI, IC, E> Ds323x<DI, IC>
where
DI: ReadData<Error = Error<CommE, PinE>> + WriteData<Error = Error<CommE, PinE>>,
DI: ReadData<Error = Error<E>> + WriteData<Error = Error<E>>,
{
/// Read whether the oscillator is running
pub fn running(&mut self) -> Result<bool, Error<CommE, PinE>> {
pub fn running(&mut self) -> Result<bool, Error<E>> {
let control = self.iface.read_register(Register::CONTROL)?;
Ok((control & BitFlags::EOSC) == 0)
}
/// Read the busy status
pub fn busy(&mut self) -> Result<bool, Error<CommE, PinE>> {
pub fn busy(&mut self) -> Result<bool, Error<E>> {
let status = self.iface.read_register(Register::STATUS)?;
Ok((status & BitFlags::BUSY) != 0)
}
@ -28,7 +28,7 @@ where
///
/// Once this is true, it will stay as such until cleared with
/// [`clear_has_been_stopped_flag()`](#method.clear_has_been_stopped_flag)
pub fn has_been_stopped(&mut self) -> Result<bool, Error<CommE, PinE>> {
pub fn has_been_stopped(&mut self) -> Result<bool, Error<E>> {
let status = self.iface.read_register(Register::STATUS)?;
Ok((status & BitFlags::OSC_STOP) != 0)
}
@ -37,7 +37,7 @@ where
/// stopped at some point.
///
/// See also: [`has_been_stopped()`](#method.has_been_stopped)
pub fn clear_has_been_stopped_flag(&mut self) -> Result<(), Error<CommE, PinE>> {
pub fn clear_has_been_stopped_flag(&mut self) -> Result<(), Error<E>> {
let status = self.status & !BitFlags::OSC_STOP;
self.write_status_without_clearing_alarm(status)
}
@ -46,7 +46,7 @@ where
///
/// Once this is true, it will stay as such until cleared with
/// [`clear_alarm1_matched_flag()`](#method.clear_alarm1_matched_flag)
pub fn has_alarm1_matched(&mut self) -> Result<bool, Error<CommE, PinE>> {
pub fn has_alarm1_matched(&mut self) -> Result<bool, Error<E>> {
let status = self.iface.read_register(Register::STATUS)?;
Ok((status & BitFlags::ALARM1F) != 0)
}
@ -54,7 +54,7 @@ where
/// Clear flag signalling whether the Alarm1 has matched at some point.
///
/// See also: [`has_alarm1_matched()`](#method.has_alarm1_matched)
pub fn clear_alarm1_matched_flag(&mut self) -> Result<(), Error<CommE, PinE>> {
pub fn clear_alarm1_matched_flag(&mut self) -> Result<(), Error<E>> {
let status = self.status | BitFlags::ALARM2F;
self.iface.write_register(Register::STATUS, status)
}
@ -63,7 +63,7 @@ where
///
/// Once this is true, it will stay as such until cleared with
/// [`clear_alarm2_matched_flag()`](#method.clear_alarm2_matched_flag)
pub fn has_alarm2_matched(&mut self) -> Result<bool, Error<CommE, PinE>> {
pub fn has_alarm2_matched(&mut self) -> Result<bool, Error<E>> {
let status = self.iface.read_register(Register::STATUS)?;
Ok((status & BitFlags::ALARM2F) != 0)
}
@ -71,7 +71,7 @@ where
/// Clear flag signalling whether the Alarm2 has matched at some point.
///
/// See also: [`has_alarm2_matched()`](#method.has_alarm2_matched)
pub fn clear_alarm2_matched_flag(&mut self) -> Result<(), Error<CommE, PinE>> {
pub fn clear_alarm2_matched_flag(&mut self) -> Result<(), Error<E>> {
let status = self.status | BitFlags::ALARM1F;
self.iface.write_register(Register::STATUS, status)
}
@ -80,7 +80,7 @@ where
///
/// Note: It is possible to manually force a temperature conversion with
/// [`convert_temperature()`](#method.convert_temperature)
pub fn temperature(&mut self) -> Result<f32, Error<CommE, PinE>> {
pub fn temperature(&mut self) -> Result<f32, Error<E>> {
let mut data = [Register::TEMP_MSB, 0, 0];
self.iface.read_data(&mut data)?;
let is_negative = (data[1] & 0b1000_0000) != 0;

37
src/interface.rs
View File

@ -1,7 +1,7 @@
//! I2C/SPI interfaces
use crate::{private, Error, DEVICE_ADDRESS};
use embedded_hal::{digital::OutputPin, i2c, spi};
use embedded_hal::{i2c, spi};
/// I2C interface
#[derive(Debug, Default)]
@ -11,9 +11,8 @@ pub struct I2cInterface<I2C> {
/// SPI interface
#[derive(Debug, Default)]
pub struct SpiInterface<SPI, CS> {
pub struct SpiInterface<SPI> {
pub(crate) spi: SPI,
pub(crate) cs: CS,
}
/// Write data
@ -30,7 +29,7 @@ impl<I2C, E> WriteData for I2cInterface<I2C>
where
I2C: i2c::I2c<Error = E>,
{
type Error = Error<E, ()>;
type Error = Error<E>;
fn write_register(&mut self, register: u8, data: u8) -> Result<(), Self::Error> {
let payload: [u8; 2] = [register, data];
self.i2c
@ -43,28 +42,20 @@ where
}
}
impl<SPI, CS, CommE, PinE> WriteData for SpiInterface<SPI, CS>
impl<SPI, E> WriteData for SpiInterface<SPI>
where
SPI: spi::SpiDevice<u8, Error = CommE>,
CS: OutputPin<Error = PinE>,
SPI: spi::SpiDevice<u8, Error = E>,
{
type Error = Error<CommE, PinE>;
type Error = Error<E>;
fn write_register(&mut self, register: u8, data: u8) -> Result<(), Self::Error> {
self.cs.set_low().map_err(Error::Pin)?;
let payload: [u8; 2] = [register + 0x80, data];
let result = self.spi.write(&payload).map_err(Error::Comm);
self.cs.set_high().map_err(Error::Pin)?;
result
}
fn write_data(&mut self, payload: &mut [u8]) -> Result<(), Self::Error> {
self.cs.set_low().map_err(Error::Pin)?;
payload[0] += 0x80;
let result = self.spi.write(payload).map_err(Error::Comm);
self.cs.set_high().map_err(Error::Pin)?;
result
}
}
@ -83,7 +74,7 @@ impl<I2C, E> ReadData for I2cInterface<I2C>
where
I2C: i2c::I2c<Error = E>,
{
type Error = Error<E, ()>;
type Error = Error<E>;
fn read_register(&mut self, register: u8) -> Result<u8, Self::Error> {
let mut data = [0];
self.i2c
@ -100,24 +91,18 @@ where
}
}
impl<SPI, CS, CommE, PinE> ReadData for SpiInterface<SPI, CS>
impl<SPI, E> ReadData for SpiInterface<SPI>
where
SPI: spi::SpiDevice<u8, Error = CommE>,
CS: OutputPin<Error = PinE>,
SPI: spi::SpiDevice<u8, Error = E>,
{
type Error = Error<CommE, PinE>;
type Error = Error<E>;
fn read_register(&mut self, register: u8) -> Result<u8, Self::Error> {
self.cs.set_low().map_err(Error::Pin)?;
let mut data = [register, 0];
let result = self.spi.transfer_in_place(&mut data).map_err(Error::Comm);
self.cs.set_high().map_err(Error::Pin)?;
result.and(Ok(data[1]))
}
fn read_data(&mut self, payload: &mut [u8]) -> Result<(), Self::Error> {
self.cs.set_low().map_err(Error::Pin)?;
let result = self.spi.transfer(payload, &[]).map_err(Error::Comm);
self.cs.set_high().map_err(Error::Pin)?;
result
self.spi.transfer_in_place(payload).map_err(Error::Comm)
}
}

22
src/lib.rs
View File

@ -157,15 +157,17 @@
//!
//! ```no_run
//! use ds323x::Ds323x;
//! use linux_embedded_hal::{SysfsPin as Pin, Spidev};
//! use embedded_hal_bus::spi::ExclusiveDevice;
//! use linux_embedded_hal::{Delay, SpidevBus, SysfsPin};
//!
//! let dev = Spidev::open("/dev/spidev0.0").unwrap();
//! let chip_select = Pin::new(24);
//! let rtc = Ds323x::new_ds3234(dev, chip_select);
//! let spi = SpidevBus::open("/dev/spidev0.0").unwrap();
//! let chip_select = SysfsPin::new(25);
//! let dev = ExclusiveDevice::new(spi, chip_select, Delay).unwrap();
//! let rtc = Ds323x::new_ds3234(dev);
//! // do something...
//!
//! // get the SPI device and chip select pin back
//! let (dev, chip_select) = rtc.destroy_ds3234();
//! // get the SPI device back
//! let dev = rtc.destroy_ds3234();
//! ```
//!
//! ### Set the current date and time at once
@ -375,11 +377,9 @@ pub const SPI_MODE_3: Mode = MODE_3;
/// All possible errors in this crate
#[derive(Debug)]
pub enum Error<CommE, PinE> {
pub enum Error<E> {
/// I²C/SPI bus error
Comm(CommE),
/// Pin setting error
Pin(PinE),
Comm(E),
/// Invalid input data provided
InvalidInputData,
/// Internal device state is invalid.
@ -498,7 +498,7 @@ mod private {
use super::{ic, interface};
pub trait Sealed {}
impl<SPI, CS> Sealed for interface::SpiInterface<SPI, CS> {}
impl<SPI> Sealed for interface::SpiInterface<SPI> {}
impl<I2C> Sealed for interface::I2cInterface<I2C> {}
impl Sealed for ic::DS3231 {}

2
tests/alarms.rs
View File

@ -583,7 +583,7 @@ macro_rules! set_alarm_test {
($name:ident, $method:ident, $register:ident, [ $( $registers:expr ),+ ], $( $value:expr ),+) => {
set_values_test!($name, $method,
[ I2cTrans::write(DEV_ADDR, vec![Register::$register, $( $registers ),*]) ],
[ SpiTrans::write_vec(vec![Register::$register + 0x80, $( $registers ),*]) ],
[ SpiTrans::transaction_start(), SpiTrans::write_vec(vec![Register::$register + 0x80, $( $registers ),*]), SpiTrans::transaction_end() ],
$($value),*
);
};

32
tests/common/mod.rs
View File

@ -86,8 +86,8 @@ pub fn new_ds3232(
pub fn new_ds3234(
transactions: &[SpiTrans<u8>],
) -> Ds323x<interface::SpiInterface<SpiMock<u8>, DummyOutputPin>, ic::DS3234> {
Ds323x::new_ds3234(SpiMock::new(transactions), DummyOutputPin)
) -> Ds323x<interface::SpiInterface<SpiMock<u8>>, ic::DS3234> {
Ds323x::new_ds3234(SpiMock::new(transactions))
}
pub fn destroy_ds3231(dev: Ds323x<interface::I2cInterface<I2cMock>, ic::DS3231>) {
@ -98,10 +98,8 @@ pub fn destroy_ds3232(dev: Ds323x<interface::I2cInterface<I2cMock>, ic::DS3232>)
dev.destroy_ds3232().done();
}
pub fn destroy_ds3234(
dev: Ds323x<interface::SpiInterface<SpiMock<u8>, DummyOutputPin>, ic::DS3234>,
) {
dev.destroy_ds3234().0.done();
pub fn destroy_ds3234(dev: Ds323x<interface::SpiInterface<SpiMock<u8>>, ic::DS3234>) {
dev.destroy_ds3234().done();
}
#[macro_export]
@ -210,10 +208,14 @@ macro_rules! get_param_test {
vec![Register::$register],
vec![$binary_value]
)],
[SpiTrans::transfer(
[
SpiTrans::transaction_start(),
SpiTrans::transfer_in_place(
vec![Register::$register, 0],
vec![Register::$register, $binary_value]
)]
),
SpiTrans::transaction_end(),
]
);
};
}
@ -228,7 +230,10 @@ macro_rules! transactions_i2c_read {
#[macro_export]
macro_rules! transactions_spi_read {
($register1:ident, [ $( $read_bin:expr ),+ ], [ $( $read_bin2:expr ),+ ]) => {
[ SpiTrans::transfer(vec![Register::$register1, $( $read_bin2 ),*], vec![Register::$register1, $( $read_bin ),*]) ]
[SpiTrans::transaction_start(),
SpiTrans::transfer_in_place(vec![Register::$register1, $( $read_bin2 ),*], vec![Register::$register1, $( $read_bin ),*]),
SpiTrans::transaction_end()
]
}
}
@ -285,10 +290,11 @@ macro_rules! set_param_test {
DEV_ADDR,
vec![Register::$register, $binary_value]
)],
[SpiTrans::write_vec(vec![
Register::$register + 0x80,
$binary_value
])]
[
SpiTrans::transaction_start(),
SpiTrans::write_vec(vec![Register::$register + 0x80, $binary_value]),
SpiTrans::transaction_end(),
]
);
};
}

34
tests/configuration.rs
View File

@ -46,10 +46,11 @@ macro_rules! call_method_test {
DEV_ADDR,
vec![Register::$register, $value_enabled]
)],
[SpiTrans::write_vec(vec![
Register::$register + 0x80,
$value_enabled
])]
[
SpiTrans::transaction_start(),
SpiTrans::write_vec(vec![Register::$register + 0x80, $value_enabled]),
SpiTrans::transaction_end(),
]
);
};
}
@ -83,10 +84,11 @@ macro_rules! call_method_status_test {
$method,
new_ds3234,
destroy_ds3234,
[SpiTrans::write_vec(vec![
Register::STATUS + 0x80,
$value_ds323x
])]
[
SpiTrans::transaction_start(),
SpiTrans::write_vec(vec![Register::STATUS + 0x80, $value_ds323x]),
SpiTrans::transaction_end(),
]
);
}
};
@ -104,10 +106,14 @@ macro_rules! change_if_necessary_test {
vec![Register::$register],
vec![$value_enabled]
)],
[SpiTrans::transfer(
[
SpiTrans::transaction_start(),
SpiTrans::transfer_in_place(
vec![Register::$register, 0],
vec![Register::$register, $value_enabled]
)]
),
SpiTrans::transaction_end(),
]
);
call_triple_test!(
@ -122,11 +128,15 @@ macro_rules! change_if_necessary_test {
I2cTrans::write(DEV_ADDR, vec![Register::$register, $value_enabled])
],
[
SpiTrans::transfer(
SpiTrans::transaction_start(),
SpiTrans::transfer_in_place(
vec![Register::$register, 0],
vec![Register::$register, $value_disabled]
),
SpiTrans::write_vec(vec![Register::$register + 0x80, $value_enabled])
SpiTrans::transaction_end(),
SpiTrans::transaction_start(),
SpiTrans::write_vec(vec![Register::$register + 0x80, $value_enabled]),
SpiTrans::transaction_end(),
]
);
}

22
tests/datetime.rs
View File

@ -35,11 +35,15 @@ macro_rules! read_set_param_write_two_test {
I2cTrans::write(DEV_ADDR, vec![Register::$register, $bin1, $bin2])
],
[
SpiTrans::transfer(
SpiTrans::transaction_start(),
SpiTrans::transfer_in_place(
vec![Register::$register, 0],
vec![Register::$register, $binary_value1_read]
),
SpiTrans::write_vec(vec![Register::$register + 0x80, $bin1, $bin2])
SpiTrans::transaction_end(),
SpiTrans::transaction_start(),
SpiTrans::write_vec(vec![Register::$register + 0x80, $bin1, $bin2]),
SpiTrans::transaction_end(),
]
);
};
@ -60,11 +64,15 @@ macro_rules! read_set_param_test {
I2cTrans::write(DEV_ADDR, vec![Register::$register, $binary_value_write])
],
[
SpiTrans::transfer(
SpiTrans::transaction_start(),
SpiTrans::transfer_in_place(
vec![Register::$register, 0],
vec![Register::$register, $binary_value_read]
),
SpiTrans::write_vec(vec![Register::$register + 0x80, $binary_value_write])
SpiTrans::transaction_end(),
SpiTrans::transaction_start(),
SpiTrans::write_vec(vec![Register::$register + 0x80, $binary_value_write]),
SpiTrans::transaction_end(),
]
);
};
@ -256,7 +264,11 @@ macro_rules! transactions_i2c_write {
macro_rules! transactions_spi_write {
($register:ident, [ $( $exp_bin:expr ),+ ]) => {
[ SpiTrans::write_vec(vec![Register::$register + 0x80, $( $exp_bin ),*]) ]
[
SpiTrans::transaction_start(),
SpiTrans::write_vec(vec![Register::$register + 0x80, $( $exp_bin ),*]),
SpiTrans::transaction_end()
]
};
}

15
tests/ds3232_4.rs
View File

@ -24,7 +24,11 @@ macro_rules! call_method_status_test {
$method,
new_ds3234,
destroy_ds3234,
[SpiTrans::write_vec(vec![Register::STATUS + 0x80, $value])]
[
SpiTrans::transaction_start(),
SpiTrans::write_vec(vec![Register::STATUS + 0x80, $value]),
SpiTrans::transaction_end(),
]
);
}
};
@ -66,10 +70,11 @@ macro_rules! set_param_test_2_4 {
DEV_ADDR,
vec![Register::$register, $binary_value]
)],
[SpiTrans::write_vec(vec![
Register::$register + 0x80,
$binary_value
])]
[
SpiTrans::transaction_start(),
SpiTrans::write_vec(vec![Register::$register + 0x80, $binary_value]),
SpiTrans::transaction_end(),
]
);
};
}

15
tests/ds3234.rs
View File

@ -9,7 +9,11 @@ call_test!(
enable_temperature_conversions_on_battery,
new_ds3234,
destroy_ds3234,
[SpiTrans::write_vec(vec![Register::TEMP_CONV + 0x80, 0])]
[
SpiTrans::transaction_start(),
SpiTrans::write_vec(vec![Register::TEMP_CONV + 0x80, 0]),
SpiTrans::transaction_end()
]
);
call_test!(
@ -17,8 +21,9 @@ call_test!(
disable_temperature_conversions_on_battery,
new_ds3234,
destroy_ds3234,
[SpiTrans::write_vec(vec![
Register::TEMP_CONV + 0x80,
BitFlags::TEMP_CONV_BAT
])]
[
SpiTrans::transaction_start(),
SpiTrans::write_vec(vec![Register::TEMP_CONV + 0x80, BitFlags::TEMP_CONV_BAT]),
SpiTrans::transaction_end(),
]
);